cys t ech electronics corp. s pec. no. : c306 s5 issued date : 20 1 1.01.07 revised date : page no. : 1/6 HBP1037S5 c y s t ek product s pecification general purpose pnp epitaxial planar transistors (dual transistors) HBP1037S5 features ? two bta1037 chips in a sot-353 package. ? mounting possible with sot-323 automatic mounting machines. ? mounting cost and area can be cut in half. ? excellent h fe linearity ? pb-free lead plating and halogen free package. equivalent circuit outline HBP1037S5 sot-353 tr1 tr2 the following characteristics apply to both tr1 and tr2 absolute maximum ratings (ta=25 c) parameter symbol limits unit collecto r -b ase v o ltage v cbo -60 v collector-emitter voltage v ceo -50 v emitter-base voltage v ebo -6 v collector current i c -150 ma base current i b -30 ma power dissipation p d 200(total) *1 mw junction temperature tj 150 c storage temperature tstg -55~+150 c note : *1 150mw per element must not be exceeded http://
cys t ech electronics corp. s pec. no. : c306 s5 issued date : 20 1 1.01.07 revised date : page no. : 2/6 HBP1037S5 c y s t ek product s pecification characteristics (ta=25 c) symbol min. typ. max. unit test conditions bv cbo -60 - - v i c =-50 a bv ceo -50 - - v i c =-1ma bv ebo -6 - - v i e =-50 a i cbo - - -0.1 a v cb =-60v i ebo - - -0.1 a v eb =-6v *v ce(sat) - -0.2 -0.3 v i c =-100ma, i b =-10ma *h fe 200 - 400 v ce =-6v, i c =-1ma f t 80 110 - mhz v ce =-12v, i c =-1ma, f=100mhz cob - 2.3 3.5 pf v cb =-10v, f=1mhz *pulse test: pulse width 380 s, duty cycle 2% ordering information device package shipping marking HBP1037S5 sot-353 (pb-free lead plating an d halogen free package) 3000 pcs / tape & reel sgr
cys t ech electronics corp. s pec. no. : c306 s5 issued date : 20 1 1.01.07 revised date : page no. : 3/6 HBP1037S5 c y s t ek product s pecification typical characteristics cu rre nt g a i n vs c ol l e c t o r c urre nt 10 100 1 000 0. 1 1 10 10 0 1000 c o l l e c t or c u rre n t ---ic (ma ) curr e n t g a i n- -- hf e hfe@vce=6v saturation voltage vs collector current 10 100 1000 0. 1 1 10 1 00 1 000 c o l l e c t o r c urre n t ---ic ( ma ) s a tu r a ti o n vo lta g e - - - ( m v ) vce(sat)@ic=10ib s a t ura t i on v ol t a ge vs co l l e c t or curre n t 100 100 0 1000 0 0. 1 1 1 0 10 0 1 00 0 c o l l e c t o r c u rre n t ---i c ( ma ) s a tu r a tio n vo lta g e - - - ( m v) vbe(sat)@ic=10ib c u t o ff f r e q u e n c y vs c ol l e c t o r c urre nt 10 10 0 10 00 0. 1 1 10 100 c o l l e c t or c u rre n t ---ic (ma ) cut of f f r e que nc y- - - f t ( m h z ) ft@vce=12v c a p a cit a n ce c h ar a c te r i s t ics 1 10 100 0. 1 1 10 1 00 r e v e rs e -b i a s e d v o l t a g e ---(v ) c a p a c i t a nc e ---( p f ) ft=1mhz cib cob p o w e r d e ra t i ng c u rve s 0 50 100 150 200 250 0 50 100 150 200 a m b i e n t t e mp e r a t u r e --- t a ( ) power dissipation---pd(mw) dual single
cys t ech electronics corp. s pec. no. : c306 s5 issued date : 20 1 1.01.07 revised date : page no. : 4/6 HBP1037S5 c y s t ek product s pecification reel dimension carrier tape dimension
cys t ech electronics corp. s pec. no. : c306 s5 issued date : 20 1 1.01.07 revised date : page no. : 5/6 HBP1037S5 c y s t ek product s pecification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max.
cys t ech electronics corp. s pec. no. : c306 s5 issued date : 20 1 1.01.07 revised date : page no. : 6/6 HBP1037S5 c y s t ek product s pecification sot-353 dimension *:typical millimeters inches millimeters inches dim min. max. min. max. 5-l ead sot - 353 pla s tic surface mou n ted packa g e cys t ek pa ckage code: s5 st y l e : pin 1. base1 (b1) pin 2. emitter1 (e1)/emitter 2(e2) pin 3. base2 (b2) pin 4. collector2 (c2) pin 5. collector1 (c1) marking: sgr dim min. max. min. max. a 0.900 1.100 0.035 0.043 e1 2.150 2.450 0.085 0.096 a1 0.000 0.100 0.000 0.004 e 0.650* 0.026* a2 0.900 1.000 0.035 0.039 e1 1.200 1.400 0.047 0.055 b 0.150 0.350 0.006 0.014 l 0.525 ref 0.021 ref c 0.080 0.150 0.003 0.006 l1 0.260 0.460 0.010 0.018 d 2.000 2.200 0.079 0.087 0 8 0 8 e 1.150 1.350 0.045 0.053 notes : 1 .controlling dimension : millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material : ? lead : pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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